Abstract: As CMOS device sizes continue to scale down, radiation-related reliability issues are of ever-growing concern. Single event double node upsets (SEDUs) in sequential logic and single event ...
Final design project for an Engineering Physics course at McMaster University. A finite-state machine that was designed using the ICs available to us and NI Multisim to produce a device that cycled ...
Overview of digital logic design. Implementation technologies, timing in combinational and sequential circuits, EDA tools, basic arithmetic units, introduction to simulation and synthesis using ...
Abstract: This paper focuses on the application of Virtual Reconfigurable Circuit (VRC) design methodology and intrinsic evolution for the design of small sequential circuits and their implementation ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback